The authors have performed electron spin resonance and electrical measurements on SiO{sub 2}/Si structures subjected to anneals in 5% H{sub 2}/N{sub 2} or 5% D{sub 2}/N{sub 2} gases and subsequently injected with electrons using corona ions and ultra-violet radiation. Threshold voltage and transconductance measurements have also been made on 0.25 {micro}m metal-oxide-semiconductor transistors subjected to 400 C anneals in the same gases and subsequently aged by hot electron injection. The electrical data on SiO{sub 2}/Si structures indicates that the density of interface states increases as a result of electron injection but that there are only minor differences between H and D passivated interfaces. The data on P{sub b}, trivalent Si dangl...
Electron spin resonance studies have been performed on arrays of single-crystalline Si nanowires (NW...
The phenomenon of two-state inversion gate current of metal-oxide-semiconductor device with p-type s...
As design rules shrink to conform with ULSI device dimensions, gate dielectrics for MOSFET structure...
172 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1988.Silicon dioxide has had a dom...
Extensive low-temperature (T) electron spin resonance studies (ESR) have been carried out on as-fabr...
One of the major defects that contribute to the interface states in the silicon band gap is the dang...
The influence of atomic hydrogen on the surface passivation of the Si-SiO2 interface is investigated...
Interface traps in the Si/SiO2 system have been examined by adapted-junction space-charge methods. P...
Hot electron induced degradation in 0.25 {micro}m, n-channel MOSFETs annealed in H{sub 2} or D{sub 2...
This work investigates the screening of hot carrier stress degradation in n-channel MOSFETs when the...
MOS-structures with pure SiO2-films, with nitrided Si-SiO2 interface region and with an insulator la...
This paper shows that a structural transition layer of SiO2 exists at an SiO~/Si interface prepared ...
The thermal stability under isochronal annealing of the GeSi/SiO2 interfaces in the condensation gro...
A review of the electronic or electron and hole traps at Si/SiO2 interfaces of MOS capacitances and ...
This paper reports the experimental evidence of anomalous electrical characteristics of large test s...
Electron spin resonance studies have been performed on arrays of single-crystalline Si nanowires (NW...
The phenomenon of two-state inversion gate current of metal-oxide-semiconductor device with p-type s...
As design rules shrink to conform with ULSI device dimensions, gate dielectrics for MOSFET structure...
172 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1988.Silicon dioxide has had a dom...
Extensive low-temperature (T) electron spin resonance studies (ESR) have been carried out on as-fabr...
One of the major defects that contribute to the interface states in the silicon band gap is the dang...
The influence of atomic hydrogen on the surface passivation of the Si-SiO2 interface is investigated...
Interface traps in the Si/SiO2 system have been examined by adapted-junction space-charge methods. P...
Hot electron induced degradation in 0.25 {micro}m, n-channel MOSFETs annealed in H{sub 2} or D{sub 2...
This work investigates the screening of hot carrier stress degradation in n-channel MOSFETs when the...
MOS-structures with pure SiO2-films, with nitrided Si-SiO2 interface region and with an insulator la...
This paper shows that a structural transition layer of SiO2 exists at an SiO~/Si interface prepared ...
The thermal stability under isochronal annealing of the GeSi/SiO2 interfaces in the condensation gro...
A review of the electronic or electron and hole traps at Si/SiO2 interfaces of MOS capacitances and ...
This paper reports the experimental evidence of anomalous electrical characteristics of large test s...
Electron spin resonance studies have been performed on arrays of single-crystalline Si nanowires (NW...
The phenomenon of two-state inversion gate current of metal-oxide-semiconductor device with p-type s...
As design rules shrink to conform with ULSI device dimensions, gate dielectrics for MOSFET structure...