Fabrication of high-density cantilever arrays and through-wafer interconnects

Processes to fabricate dense, dry released microstructures with electrical connections on the opposite side of the wafer are described. A 10 x 10 array of silicon and polysilicon cantilevers with high packing density (5 tips/mm²) and high uniformity (<10 µm length variation across the wafer) are demonstrated. The cantilever release process uses a deep SF₆/C₄F₈, plasma etch followed by a HBr plasma etch to accurately release cantilevers. A process for fabricating electrical contacts through the backside of the wafer is also described. Electrodeposited resist, conformal CVD metal deposition and deep SF₆/C₄F₈ plasma etching are used to make 30 µm/side square vias each of which has a resistance of 50 m(omega)