Advances in integrated circuit technology continue to provide more and more transistors on a chip. Computer architects are faced with the challenge of finding the best way to translate these resources into high performance. The challenge in the design of next generation CPU (central processing unit) lies not on trying to use up the silicon area, but on finding smart ways to make use of the wealth of transistors now available. In addition, the next generation architecture should offer high throughout performance, scalability, modularity, and low energy consumption, instead of an architecture that is suitable for only one class of applications or users, or only emphasize faster clock rate. A program exhibits different types of parallelism: in...
Two ways to exploit chips with a very large number of transistors are multicore processors and progr...
A common approach to decreasing embedded application execution time is creating a homogeneous parall...
As transistor size shrinks and chip complexity increases it is possible to place more transistor ont...
Li, XiaomingWith the Dennard Scaling law break for a long time, the computer architecture design pro...
To achieve high performance, contemporary computer systems rely on two forms of parallelism: instruc...
To achieve high performance, contemporary computer systems rely on two forms of parallelism: instruc...
Modem processors are designed to achieve greater amounts of instruction level parallelism (ILP) and ...
We introduce explicit multi-threading (XMT), a decentralized architecture that exploits fine-grained...
The end of Dennard scaling also brought an end to frequency scaling as a means to improve performanc...
The need for fast time to market of new embedded processor-based designs calls for a rapid design me...
Abstract | Modern day computer systems rely on two forms of parallelism to achieve high performance,...
As the number of transistors on a single chip continues to grow, it is important to think beyond the...
In this paper the Scheduled Dataflow (SDF) architecture - a decoupled memory/execution, multithreade...
dataflow processors, superscalar processors, instruction scheduling, trace scheduling, software pipe...
has emphasized instruction-level parallelism, which improves performance by increasing the number of...
Two ways to exploit chips with a very large number of transistors are multicore processors and progr...
A common approach to decreasing embedded application execution time is creating a homogeneous parall...
As transistor size shrinks and chip complexity increases it is possible to place more transistor ont...
Li, XiaomingWith the Dennard Scaling law break for a long time, the computer architecture design pro...
To achieve high performance, contemporary computer systems rely on two forms of parallelism: instruc...
To achieve high performance, contemporary computer systems rely on two forms of parallelism: instruc...
Modem processors are designed to achieve greater amounts of instruction level parallelism (ILP) and ...
We introduce explicit multi-threading (XMT), a decentralized architecture that exploits fine-grained...
The end of Dennard scaling also brought an end to frequency scaling as a means to improve performanc...
The need for fast time to market of new embedded processor-based designs calls for a rapid design me...
Abstract | Modern day computer systems rely on two forms of parallelism to achieve high performance,...
As the number of transistors on a single chip continues to grow, it is important to think beyond the...
In this paper the Scheduled Dataflow (SDF) architecture - a decoupled memory/execution, multithreade...
dataflow processors, superscalar processors, instruction scheduling, trace scheduling, software pipe...
has emphasized instruction-level parallelism, which improves performance by increasing the number of...
Two ways to exploit chips with a very large number of transistors are multicore processors and progr...
A common approach to decreasing embedded application execution time is creating a homogeneous parall...
As transistor size shrinks and chip complexity increases it is possible to place more transistor ont...