[[abstract]]In this letter, the authors demonstrate that high quality factor and low power loss transformers can be obtained by using the CMOS process-compatible. backside inductively coupled plasma (ICP) deep-trench technology to selectively remove the silicon underneath the transformers. A 62.4% (from 8.99 to 14.6) and a 205.8% (from 8.6 to 26.3) increase in the Q-factor, a 10.3% (from 0.697 to 0.769) and a 30.2% (from 0.652 to 0.849) increase in the maximum available power gain (G(Amax)), and a 0.43- (from 1.57 to 1.14 dB) and a 1.15-dB (from 1.86 to 0.71 dB) reduction in the minimum noise figure (NFmin) were achieved at 5.2 and 10 GHz, respectively, for a bifilar transformer with overall dimension of 240 x 240 mu m(2) after the backside...