Design and implementation of a high-performance 60-GHz CMOS slot antenna

[[abstract]]This article describes the design and implementation of a monolithic 60-GHz millimeter-wave planar CMOS slot antenna. A finite element method-based three-dimensional full-wave electromagnetic solver, high-frequency structure simulator, is used to simulate and optimize the performance of the antenna. The feeding network adopts the coplanar waveguide (CPW) structure, so the on-chip antenna can be flip-chip bonded to a CPW RO4003 conversion board for complete radiation-pattern measurement. Nearly, omnidirectional operation is achieved by providing four major current paths in the shape of a cross for radiation. The measured input voltage standing wave ratio of the on-chip slot antenna is smaller than 2 for frequencies 54.668.3 GHz. The measured maximum power gain is -0.74 dB at 60 GHz, one of the highest power gains ever reported for a CMOS antenna at 60 GHz. The chip area is only 1 x 0.8 mm2, i.e., 0.8 mm2. (C) 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2061-2065, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27012[[note]]SC