Characteristics of Gate Dielectrics under Nanoscale Current/Voltage/ Mechanical Stresses

[[abstract]]本篇論文主要分為兩個部份，第一部份為二氧化矽(SiO2)閘極絕緣層部份，這部份主要延伸本實驗室先前在奈米尺度下薄閘極氧化層之退化及崩潰特性之研究。通常我們希望金氧半場效應電晶體(MOSFET)與雙載子電晶體(BJT)等元件在較差的甚至較惡劣的環境中，例如在充滿溼氣或輻射環境下，依然能夠正常工作。本論文中，我們也使用傳導式原子力顯微鏡(C-AFM)觀察閘極絕緣層樣品在輻射前、後其電性的變化，藉以瞭解輻射對絕緣層在微觀下的行為。因為C-AFM探針面積是10-12 cm2，相當接近於氧化層單一崩潰點的面積大小，因此我們嘗試使用C-AFM去量測氧化層在奈米尺度下的電性，所量測得到的電性是氧化層非常局部的行為。近年來，機械應力被施加於MOSFET中以改善電晶體的操作特性，但是文獻中並無探討受機械應力作用下之閘極氧化層於不同位置處之可靠度特性，因此我們透過C-AFM探針結合半導體參數分析儀(semiconductor parameter analyzer) Agilent 4156C對受到伸展(tensile)與壓縮(compression)機械應力的氧化層於不同表面位置施加奈米尺度的斜坡電壓應力(Ramped Voltage Stress 簡稱RVS)及固定電壓應力(Constant Voltage Stress簡稱CVS)，研究受機械應力之SiO2於不同位置之微觀尺度的電性。不論是因機械應力而向上彎曲或向下彎曲的氧化層，我們發現在氧化層中間區域 ? 亦即是曲率最大的區域，具有較氧化層兩端區域(即曲率較小的區域)有著較小的崩潰電壓及較大的漏電流。另外，我們也使用結合半導體參數分析儀的傳導式原子力顯微鏡對SiO2施加奈米尺度之動態雙極性(bipolar)與單極性(unipolar)脈波。與直流應力比較，由實驗的結果我們發現單極性脈波應力作用下的氧化層會具有較高的平均崩潰時間，但此崩潰時間會隨頻率的增加而減短。隨著負載週期增加，脈衝應力持續作用於氧化層上的時間也就增加了，故崩潰時間便減短了。而在雙極性脈衝應力下，氧化層不容易產生硬崩潰(hard breakdown)，而是發生軟崩潰(soft breakdown)的現象，隨著頻率愈大，它的崩潰時間也愈長，但當超過某一定頻率後，崩潰時間卻反而開始縮短了。 本論文的第二部份則是以高介電常數二氧化鉿(HfO2)做為閘極絕緣層。我們特別根據所量出來的HfO2奈米尺度下之I-V曲線，提出了傅勒-諾德翰(Fowler-Nordheim Tunneling)加雙缺陷輔助穿遂(Two-Trap Assisted Tunneling TTAT)模型來說明HfO2的傳導特性。我們也針對經由不同氣體做沉積後退火之二氧化鉿為閘極絕緣層的金屬-氧化物-半導體電容(MOSC)元件進行量測以比較在不同條件退火下的電容-電壓、電流-電壓、介面缺陷電荷密度(interface trap density)及輻射後特性之變化。其後，我們再探討以傳導式原子力顯微鏡結合半導體參數分析儀4156C量測經過不同退火處理之HfO2於奈米尺度RVS與CVS應力作用下之可靠度；實驗的結果顯示經由氘氣沉積後退火之HfO2可以有較佳的可靠度。[[abstract]]This thesis is divided into two parts. The first part focuses on the degradation and breakdown characteristics at nanoscale of silicon dioxide (SiO2) gate insulator, which is an extension of the previous research work of our Lab. For both the metal-oxide-semiconductor field-effect transistors (MOSFET) and bipolar transistors (BJT), it is usually required that they can be operated properly even in harsh environments such as under high moisture and strong radiation background In this thesis, we used an atomic force microscope to measure the pre- and post-irradiated nanoscale electrical characteristics of thin SiO2, in order to understand its microscopic behavior under illumination of Co-60 ?-ray. Since the contact area between the atomic force microscopy tip and the sample surface is about 10-12 cm2 which is about the same size as the area of oxide breakdown, the use of conductive atomic force microscopy (C-AFM) allowing us to obtain the local behavior of thin oxide layer. On the other hand, mechanical strain has been applied to the channel of MOSFET to enhance their performances in recent years, but none in the literature has addressed the effect of mechanical strain on the nanoscale gate oxide properties at different positions on the oxide surface. Therefore, in this work nanoscale ramp voltage stress (RVS) and constant voltage stress (CVS) were applied to different surface locations along the strain axis of strained thin SiO2 samples through the C-AFM tip. The samples were bended either concaved downward or upward by a home-made bending tool to produce either tensile or compressive strain in the oxide samples. A semiconductor parameter analyzer Agilent 4156C was connected with the C-AFM to measure the nanoscale electrical characteristics including current-voltage (I-V) curves, breakdown voltages, and cumulative failure distributions of the samples. It is found that the central region (i.e. the region with higher curvature) of the strained samples always exhibited a higher oxide leakage current, a lower oxide breakdown voltage and a shorter time-to-breakdown than the side regions (i.e. the regions with smaller curvature) regardless they were under compressive or tensile strain. In addition, by taking the advantages of combining the C-AFM with semiconductor parameter analyzer, we were able to applied SiO2 samples nanoscale unipolar and bipolar pulse voltage stresses. When compared with DC stress, our experimental data show that the oxide layer subjected to unipolar pulse voltage stress always has higher time-to-breakdown which decreases with increasing frequency and is becoming shorter when the duty cycle is increased due to increasing of the stress action time on oxide. For bipolar pulse voltage stress, soft breakdown instead of hard breakdown is more often observed. It is found that the oxide takes longer time to break down when the frequency of the bipolar pulse voltage stress increases up to a certain frequency, after which however, the time-to-breakdown decreases. The theme of the second part of this thesis is aimed at the hafnium dioxide (HfO2) high-k gate insulation layer. Based on the nanoscale I-V characteristics, we proposed a Fowler-Nordheim Tunneling (FN Tunneling) plus Two-Trap-Assisted Tunneling (TTAT Tunneling) model to describe the nanoscale conduction in HfO2 high-k gate dielectric. We also compared the capacitance-voltage (C-V), current-voltage (I-V), interface trap charge density characteristics of metal-oxide-semiconductor capacitor (MOSC) devices with HfO2 gate dielectric prepared with different post-deposition annealing gas and different annealing conditions after Co-60 ?-ray irradiation. We also explored the reliability of HfO2 high-k gate dielectric prepared with different annealing conditions by applying nanoscale RVS and CVS using C-AFM in conjunction with semiconductor parameter analyzer Agilent 4156C. From our experimental results, it is found that the HfO2 subjected to deuterium (D2) gas annealing can have better gate oxide reliability.[[note]]博