A general-purpose datapath is designed for efficient execution of diverse applications. An embedded processor, typically working with a limited application domain, does not necessarily utilize the fixed, general-purpose datapath interconnect efficiently. If we consider the interconnect to be a flexible resource, the datapath can be fine tuned to an application domain. The addition of an interconnect link between two datapath units has the potential to reduce execution time, while the removal of an unused link can save area and power dissipation. Finding the most energy-efficient datapath interconnect configuration for a software application domain is a time-consuming process, since it involves rescheduling of the targeted application(s) on ...
Proc. of IEEE/ACM International Workshop on Application Specific Processors (WASP\u2702), Nov. 2002....
This paper presents a system-level technique for embedded processor-based systems targeting both dyn...
One of the biggest challenges in high-performance computing is to reduce the power and energy consum...
A general-purpose datapath interconnect is designed to make the processor efficient in executing a w...
This paper explores different data path architecture topologies for low power solutions. And we look...
This paper presents a novel system-level approach that minimizes the energy consumption of embedded ...
This paper presents a novel system-level technique that minimizes the energy consumption of embedded...
The rising complexity, customization and short time to market of modern digital systems requires aut...
We investigate the effects of introducing a flexible interconnect into an exposed datapath. We defin...
Exposing details of the processor datapath to the programmer is motivated by improvements in the ene...
Due to diversified demands of customers, embedded processor datapaths have been extended to accept m...
Tailored to run domain-specific applications under very strict constraints on, for example, real-tim...
this paper we will restrict attention to systems that support a maximum of four links per processor,...
From high level synthesis point of view, target design can be divided into two parts: controller and...
The design of an embedded processor is dependent on the application domain. Traditionally, design so...
Proc. of IEEE/ACM International Workshop on Application Specific Processors (WASP\u2702), Nov. 2002....
This paper presents a system-level technique for embedded processor-based systems targeting both dyn...
One of the biggest challenges in high-performance computing is to reduce the power and energy consum...
A general-purpose datapath interconnect is designed to make the processor efficient in executing a w...
This paper explores different data path architecture topologies for low power solutions. And we look...
This paper presents a novel system-level approach that minimizes the energy consumption of embedded ...
This paper presents a novel system-level technique that minimizes the energy consumption of embedded...
The rising complexity, customization and short time to market of modern digital systems requires aut...
We investigate the effects of introducing a flexible interconnect into an exposed datapath. We defin...
Exposing details of the processor datapath to the programmer is motivated by improvements in the ene...
Due to diversified demands of customers, embedded processor datapaths have been extended to accept m...
Tailored to run domain-specific applications under very strict constraints on, for example, real-tim...
this paper we will restrict attention to systems that support a maximum of four links per processor,...
From high level synthesis point of view, target design can be divided into two parts: controller and...
The design of an embedded processor is dependent on the application domain. Traditionally, design so...
Proc. of IEEE/ACM International Workshop on Application Specific Processors (WASP\u2702), Nov. 2002....
This paper presents a system-level technique for embedded processor-based systems targeting both dyn...
One of the biggest challenges in high-performance computing is to reduce the power and energy consum...