Modelling and characterisation of a broadband 85/170 GHz Schottky varactor frequency doubler

In this thesis, a frequency doubler is designed to produce a broadband local oscillator signal (LO) around 200 GHz. A linear array of four Schottky varactors are incorporated into a GaAs flip-chip in a balanced anti-series configuration [1], so as to generate the second harmonic of the incoming signal. The varactor chip is soldered to a suspended microstrip quartz circuit, which constitutes the input/output embedding circuit, the DC bias filter and the output E-probe. A E-plane waveguide split block is used to accommodate the doubler quartz circuit, along with an input (WR-10) and an output (WR-5) waveguide interface. Generally, an iterative design process is carried out to make a trade-off among the doubler bandwidth, the conversion efficiency and the power handling capability of the GaAs Schottky varactor chip. At room temperature, a peak output power of 10 mW is measured at an output frequency of 168 GHz, with a pump power of 50 mW and a corresponding conversion efficiency close to 20%. Under a pump power of 45 mW, a peak output is obtained at around 165 GHz, with a conversion efficiency of 16%, as well as an output power of 7 mW and an estimated 3-dB fractional bandwidth of 15%. Combined directly with the power amplifier chain, the measured peak output power is around 20 mW