We investigate the effects of introducing a flexible interconnect into an exposed datapath. We define an exposed datapath as a traditional GPP datapath that has its normal control removed, leading to the exposure of a wide control word. For an FFT benchmark, the introduction of a flexible interconnect reduces the total execution time by 16%. Compared to a traditional GPP, the execution time for an exposed datapath using a flexible interconnect is 32% shorter whereas the energy dissipation is 29% lower. Our investigation is based on a cycleaccurate architectural simulator and figures on delay, power, and area are obtained from placed-and-routed layouts in a commercial 0.13-ìm technology. The results from our case studies indicate that by uti...
This paper presents the architecture of a flexible and high performance unit for DSP applications. T...
In this paper, we present a new architectural concept for network processors called FlexPath NP. The...
This paper presents a new Field-Programmable Gate Array (FPGA) architecture which reduces the densit...
We investigate the effects of introducing a flexible interconnect into an exposed datapath. We defin...
A general-purpose datapath interconnect is designed to make the processor efficient in executing a w...
A general-purpose datapath is designed for efficient execution of diverse applications. An embedded ...
The FlexCore processor is the resulting implementation of an exposed datapath approach conceptualize...
The design of an embedded processor is dependent on the application domain. Traditionally, design so...
We introduce FlexCore, the first exemplar of an architecture based on the FlexSoC framework. Compris...
Abstract—The FlexCore processor is the resulting implementation of an exposed datapath approach conc...
Hardware specialization is often the key to efficiency for programmable embedded systems, but comes ...
Due to diversified demands of customers, embedded processor datapaths have been extended to accept m...
Leakage power is an important concern in modern electronic designs. To efficiently employ power gati...
The comfort of our daily lives has come to rely on a vast number of embedded systems, such as mobile...
Tailored to run domain-specific applications under very strict constraints on, for example, real-tim...
This paper presents the architecture of a flexible and high performance unit for DSP applications. T...
In this paper, we present a new architectural concept for network processors called FlexPath NP. The...
This paper presents a new Field-Programmable Gate Array (FPGA) architecture which reduces the densit...
We investigate the effects of introducing a flexible interconnect into an exposed datapath. We defin...
A general-purpose datapath interconnect is designed to make the processor efficient in executing a w...
A general-purpose datapath is designed for efficient execution of diverse applications. An embedded ...
The FlexCore processor is the resulting implementation of an exposed datapath approach conceptualize...
The design of an embedded processor is dependent on the application domain. Traditionally, design so...
We introduce FlexCore, the first exemplar of an architecture based on the FlexSoC framework. Compris...
Abstract—The FlexCore processor is the resulting implementation of an exposed datapath approach conc...
Hardware specialization is often the key to efficiency for programmable embedded systems, but comes ...
Due to diversified demands of customers, embedded processor datapaths have been extended to accept m...
Leakage power is an important concern in modern electronic designs. To efficiently employ power gati...
The comfort of our daily lives has come to rely on a vast number of embedded systems, such as mobile...
Tailored to run domain-specific applications under very strict constraints on, for example, real-tim...
This paper presents the architecture of a flexible and high performance unit for DSP applications. T...
In this paper, we present a new architectural concept for network processors called FlexPath NP. The...
This paper presents a new Field-Programmable Gate Array (FPGA) architecture which reduces the densit...