Electrical Characterization of Novel Insulators in Metal-Insulator-Semiconductor Structures

This thesis comprises seven papers (A-G) and an extended introduction which puts them into context within a broader field of research. The papers deal with the electrical characterization of some different insulators and interfaces encountered within the realm of silicon based microelectronics.<p /> Papers A and B concern the electrical properties of silicon dioxide layers formed by wafer bonding. It is found that pronounced charging occurs at the bonded interface during high field (Fowler-Nordheim) injection into the bonded oxide. The effect can be minimized by properly annealing the structure.<p /> Paper C deals with stress relaxation in ultra thin oxides on silicon after they have been subjected to electrical stress. The observed behavior is found to contradict the commonly adopted model for describing such phenomena.<p /> Paper D deals with the electrical properties of wafer bonded hydrophobic silicon surfaces. It is demonstrated that such bonded interfaces can be prepared with a very small energy barrier at the interface.<p /> Finally, papers E-G concern the electrical properties of undoped polycrystalline diamond films on silicon. Charge transport in such films is commonly attributed to Poole-Frenkel conduction. It is found that this model cannot explain the behavior unless the defects involved in the transport are assumed to be randomly distributed in the film and/or spread out in energy. Further, the capacitance-voltage characteristics of metal-polycrystalline diamond-silicon structures are strongly influenced by slow interface traps at the diamond-silicon interface. These traps are not in thermal equilibrium during the measurements. A new non-equilibrium model is presented and compared to the experimental results. It is found that the model agrees well with the measured data