In deep sub-micron technologies, as the wires are placed ever closer and signal rise and fall times go into the sub-nano second region, increased crosstalk has implications on the data throughput and on signal integrity. Depending on the data correlation on the coupled lines, the delay can either decrease or increase. Here we show that in uniform coupled lines, the response for several important switching configurations has a dominant pole characteristic. This allows easy prediction for the average, worst-case and best-case delay of buffered lines. We show that the repeater numbering and sizing can be optimised to deal with crosstalk under different constraints to best match the application. Area and power issues are considered and all equa...
Closed-form equations for second-order transfer functions of general arbitrarily coupled resistance-...
The transient switching delay in a micro/nano-scale circuit containing resistive and reactive elemen...
Abstrnct-The propagation delay of interconnection lines is a major factor in determining the perform...
Signalling over long interconnect is a dominant issue in electronic chip design in current technolog...
In deep sub-micron (DSM) circuits proper analysis of interconnect delay is very important. When rela...
In a parallel multiwire structure, the exact spacing and size of the wires determine both the resist...
AbstractAs the geometries of integrated circuits continue to shrink into the deep nanometer regime, ...
This thesis work investigates the effects of crosstalk on on-chip interconnects. We use optimal repe...
A System-on-a-Chip (SoC) has millions of transistors connected by wires or so called Interconnects. ...
Closed form equations for second order transfer functions of general arbitrarily-coupled RC trees wi...
In this paper, we quantify the impact of global interconnect optimi-zation techniques that address s...
A new data capturing technique for a potentially coupled bus of lines is proposed that always accomm...
UnrestrictedThis dissertation investigates the effect of capacitive crosstalk on interconnect and lo...
As Moore’s law is followed closely over the past decades, down-scaling of transistor structure lea...
In this work, we present the crosstalk is a noise caused by inter-wire coupling capacitance between ...
Closed-form equations for second-order transfer functions of general arbitrarily coupled resistance-...
The transient switching delay in a micro/nano-scale circuit containing resistive and reactive elemen...
Abstrnct-The propagation delay of interconnection lines is a major factor in determining the perform...
Signalling over long interconnect is a dominant issue in electronic chip design in current technolog...
In deep sub-micron (DSM) circuits proper analysis of interconnect delay is very important. When rela...
In a parallel multiwire structure, the exact spacing and size of the wires determine both the resist...
AbstractAs the geometries of integrated circuits continue to shrink into the deep nanometer regime, ...
This thesis work investigates the effects of crosstalk on on-chip interconnects. We use optimal repe...
A System-on-a-Chip (SoC) has millions of transistors connected by wires or so called Interconnects. ...
Closed form equations for second order transfer functions of general arbitrarily-coupled RC trees wi...
In this paper, we quantify the impact of global interconnect optimi-zation techniques that address s...
A new data capturing technique for a potentially coupled bus of lines is proposed that always accomm...
UnrestrictedThis dissertation investigates the effect of capacitive crosstalk on interconnect and lo...
As Moore’s law is followed closely over the past decades, down-scaling of transistor structure lea...
In this work, we present the crosstalk is a noise caused by inter-wire coupling capacitance between ...
Closed-form equations for second-order transfer functions of general arbitrarily coupled resistance-...
The transient switching delay in a micro/nano-scale circuit containing resistive and reactive elemen...
Abstrnct-The propagation delay of interconnection lines is a major factor in determining the perform...