Phase locked loops (PLL's) are well known as a threshold extension demodulator for analogue FM signals. This capability may lead to the low bit error rate demodulation for digital FM signals. A PLL has also its native frequency tracking ability and is suited to the demodulation of the signals having large Doppler shifts, for example signals from Low Earth Orbit (LEO) satellites. In this paper, we study the demodulation scheme of Continuous Phase FSK (CPFSK) and Gaussian filtered MSK (GMSK) signals using a Digital Signal Processing type Digital PLL (DSP DPLL). First we propose a DSP DPLL completely equivalent to an Analog PLL (APLL). Next we adopt the sequence estimation scheme to compensate the Inter-Symbol Interference (ISI) associated wit...
Precise frequency estimation is one of the most stringent constraints for Global Navigation Satellit...
A differential encoder is developed that preserves the phase trellis of continuous phase frequency s...
Abstract — Phase locked loops (PLL) and delay locked loops (DLL) play an important role in establish...
International Telemetering Conference Proceedings / October 10-12, 1972 / International Hotel, Los A...
This paper describes a modem which has been developed and implemented using a digital signal process...
Conventional DPSK systems are adversely affected by transmitter/receiver frequency offsets due to fr...
A frequency estimator well suited for digital receivers is proposed. Accurate estimates of unknown f...
The book reports two approaches of implementation of the essential components of a Digital Phase Loc...
A number of modern wireless systems use modulation schemes like CPFSK, GMSK and DPSK, where the info...
In the absence of signal imperfections other than the presence of additive white Gaussian (AWGN) noi...
Abstract—Due to a wide range of Doppler frequency shift and low SNR existing in the AIS transmission...
Software defined radar (SDR) has been the latest trend in developing enhanced radar signal processin...
This work presents a new structure for an all-digital BPSK demodulator developed for space communica...
Graduation date: 2007A digital implementation of a PLL has several advantages compared to its\ud ana...
In this paper we analyze the design of a digital PLL for a GNSS software receiver. Even if the topic...
Precise frequency estimation is one of the most stringent constraints for Global Navigation Satellit...
A differential encoder is developed that preserves the phase trellis of continuous phase frequency s...
Abstract — Phase locked loops (PLL) and delay locked loops (DLL) play an important role in establish...
International Telemetering Conference Proceedings / October 10-12, 1972 / International Hotel, Los A...
This paper describes a modem which has been developed and implemented using a digital signal process...
Conventional DPSK systems are adversely affected by transmitter/receiver frequency offsets due to fr...
A frequency estimator well suited for digital receivers is proposed. Accurate estimates of unknown f...
The book reports two approaches of implementation of the essential components of a Digital Phase Loc...
A number of modern wireless systems use modulation schemes like CPFSK, GMSK and DPSK, where the info...
In the absence of signal imperfections other than the presence of additive white Gaussian (AWGN) noi...
Abstract—Due to a wide range of Doppler frequency shift and low SNR existing in the AIS transmission...
Software defined radar (SDR) has been the latest trend in developing enhanced radar signal processin...
This work presents a new structure for an all-digital BPSK demodulator developed for space communica...
Graduation date: 2007A digital implementation of a PLL has several advantages compared to its\ud ana...
In this paper we analyze the design of a digital PLL for a GNSS software receiver. Even if the topic...
Precise frequency estimation is one of the most stringent constraints for Global Navigation Satellit...
A differential encoder is developed that preserves the phase trellis of continuous phase frequency s...
Abstract — Phase locked loops (PLL) and delay locked loops (DLL) play an important role in establish...