PCI bus connects MizzouRISC to PC

Title from PDF of title page (University of Missouri--Columbia, viewed on July 14, 2011).The entire thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file; a non-technical public abstract appears in the public.pdf file.Thesis advisor: Dr. Harry Tyrer.Includes bibliographical references.M.S. University of Missouri--Columbia 2011.This paper covers the design of a PCI transmission controller to make a 32-bit microprocessor MizzouRISC be a co-processor for a PC. The co-processor communicates with the PC through the PCI bus, and works as a target device. We implemented the VHDL firmware consisting of PCI transmission module, memory, and an existing VHDL implementation of MizzouRISC on a PCI FPGA board. On the PC, we developed a driver for the PCI FPGA board, and an application program that acts as a controller to upload and download data from the board. The application program averages the rgb components of each pixel in a 24-bit bmp file to get the gray-level image. It also uploads the image to the PCI board, waits for the interrupt, and reads the processed fragment from the PCI board. The VHDL memory is limited, so the image was divided into several image fragments. After using the image to test the entire system, we can find the relationship of the fragment size and the processing time. We used VHDL to create the memory and a slow clock for MizzouRISC timing. This compromise was due to a limitation on the FPGA of the PCI board. Future design of a new board for MizzouRISC should include a faster clock for the processor, a 32-bit SDRAM hardware module, and even a PS/2 port and a VGA port on the board