An implementation of high performance FPGA-based genus 3 HECC

In today's world people are reliant on all kinds of technological devices such as mobile phones and PDAs to communicate with each other wirelessly or through the internet. As a result, efficient implementations of cryptographic algorithms which are built on embedded systems have become increasingly more important to usability of such devices. The HyperElliptic Curve Cryptosystem (HECC) is one of the emerging cryptographic primitives of the last several years. This cryptosystem can achieve the same security as established public-key cryptosystems, such as those based on RSA or elliptic curves, with much shorter operand length. Shorter operand length means lower power consumption, less computing effort and storage requirements. Those are all fundamental factors in portable devices. However, due to the complex its group operation, it was thought that HECCs were beyond the scope for any practical application. Recently, a lot of effort has gone into developing efficient implementation of HECC in both software and hardware platforms. This thesis presents a practical design HECC in a FPGA platform using the best known explicit formulae. It represents the first ever implementation in genus 3 of HECC targeted for FPGA devices that could be well suited to embedded systems. Its architecture performs the scalar multiplication, one of the key main operations of the cryptosystem, using 4 field multipliers (of type D =4), 4 field adders; outperforming earlier genus 2 implementations in the literature at similar security level