New architecture to implement product terms in complex programmable logic devices

Nowadays, the vast majority of programmable logic devices cannot be partially reprogrammed at run-time, preventing them to support real-time reconfigurable computing applications. A new family of computational logic blocks having a dynamic reconfigurable structure is introduced in the thesis. The presented architecture implements any combinational circuit with multiple outputs. The input/output relation of these circuits is expressed by logical equations in the sum-of-product form. Each product term is translated into context words which characterize the logical behaviour of the circuit and are arranged in an array of registers. A development software environment generating necessary data for programming the circuit is given. Finally an implementation of the product terms method on an existing reconfigurable device is given to demonstrate proven advantages of the work