[[abstract]]An analogue nonvolatile memory is presented, which is not only CMOS-compatible but also capable of storing analogue currents with a resolution of more than eight bits. The programming process is controlled by a hysteretic comparator on-chip, which stops the injection current automatically by negative feedback, regardless of the programming nonlinearity and device mismatches. With the simple, on-chip programming circuit, the proposed analogue memory is capable of storing currents ranging from 1 to 18 μA accurately with negligible variations across different memory cells.[[fileno]]2030128010012[[department]]電機工程學
[[abstract]]A novel EEPROM memory cell with new program and erase operations fabricated by standard ...
Nonvolatile memory design is a discipline that employs digital and analog circuit design techniques ...
This thesis investigates different memory types for use as a synaptic storage in a neuromorphic appl...
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than b...
Abstract—The complexity of analog VLSI systems is often limited by the number of pins on a chip rath...
[[abstract]]© 2005 Japanese Journal of Applied Physics-novel electrically erasable programmable logi...
This paper presents a study upon implementation of a nonvolatile memory with a standard CMOS process...
Journal ArticleThe complexity of analog VLSI systems is often limited by the number of pins on a chi...
A 3-transistor non-volatile analog storage cell with 14 bits effective resolution and rail-to-rail b...
A voltage-type sense amplifier for low-power nonvolatile memories is presented against traditional c...
Journal ArticleThe complexity of analog VLSI systems is often limited by the number of pins on a ch...
[[abstract]]A novel multilevel/analog electrically erasable programmable read only memory (EEPROM) c...
An analogue memory chip family has been developed as a switched capacitor cell array. The family is ...
[[abstract]]A multilevel/analog electrically erasable programmable read only memory cell fabricated ...
In this paper, a thorough characterization of phase-change memory (PCM) cells was carried out, aimed...
[[abstract]]A novel EEPROM memory cell with new program and erase operations fabricated by standard ...
Nonvolatile memory design is a discipline that employs digital and analog circuit design techniques ...
This thesis investigates different memory types for use as a synaptic storage in a neuromorphic appl...
The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than b...
Abstract—The complexity of analog VLSI systems is often limited by the number of pins on a chip rath...
[[abstract]]© 2005 Japanese Journal of Applied Physics-novel electrically erasable programmable logi...
This paper presents a study upon implementation of a nonvolatile memory with a standard CMOS process...
Journal ArticleThe complexity of analog VLSI systems is often limited by the number of pins on a chi...
A 3-transistor non-volatile analog storage cell with 14 bits effective resolution and rail-to-rail b...
A voltage-type sense amplifier for low-power nonvolatile memories is presented against traditional c...
Journal ArticleThe complexity of analog VLSI systems is often limited by the number of pins on a ch...
[[abstract]]A novel multilevel/analog electrically erasable programmable read only memory (EEPROM) c...
An analogue memory chip family has been developed as a switched capacitor cell array. The family is ...
[[abstract]]A multilevel/analog electrically erasable programmable read only memory cell fabricated ...
In this paper, a thorough characterization of phase-change memory (PCM) cells was carried out, aimed...
[[abstract]]A novel EEPROM memory cell with new program and erase operations fabricated by standard ...
Nonvolatile memory design is a discipline that employs digital and analog circuit design techniques ...
This thesis investigates different memory types for use as a synaptic storage in a neuromorphic appl...