Extrapolation-Based Power Modeling for Memory Compilers Using MUX-Oriented Linear Regression

[[abstract]]In this thesis, we propose an efficient extrapolation-based power modeling method for memory compliers that generate SRAM macros. Our method only needs to simulate a small number of memory configurations with relatively small sizes. The obtained results are then extrapolated to any other configurations. Our method is much faster than the conventional interpolation-based approaches since it avoids the simulation of large-sized memory macros. For enhancing the accuracy, we combine the linear approximation with a MUX-oriented technique that successfully slashes the predicting error from 26.49% to 3.02% for the write operation and 21.49% to 2.77% for the read operation. The effects of the operating voltage and temperature on power consumption are also considered semi-analytically with only 3% approximation error.[[fileno]]2030172030058[[department]]電機工程學