VLSI architectures in real-time interframe coding for HDTV applications

[[abstract]]This paper presents a flexible VLSI architecture for full-search block matching and a systolic architecture that carries out the regular computations extracted from a parallel block matching algorithm. It also describes an effective method of similarity measure, called moment-preserving pattern matching, which reduces the computational complexity of block matching significantly and provides several advantages in hardware implementation[[fileno]]2030101030004[[department]]電機工程學