A Turbo Coded Modulation Scheme Using a Delay Processor

[[abstract]]We propose a turbo coded modulation scheme which is implemented by serially concatenating a multiplexer, a multilevel delay processor and a signal mapper to a conventional binary turbo code C. With proper design of the delay processor, signal mapper and the allocation of message and parity bits of C in the delay processor, the proposed turbo coded modulation can achieve good error performance by using only 4-sate component codes.[[fileno]]2030133030025[[department]]電機工程學