[[abstract]]A CAD tool is presented for producing very high throughput IIR filters. The architecture is a cascade of word-parallel, blocked, second-order sections. Because it is application-specific, it is a very high level CAD tool. An engineer only needs to specify 1) the word size W, 2) the block size B; and 3) each second-order section's coefficients. Using this information, the CAD tool will generate CIF files for a filter system that, operating at 10MHz, can process 5B/W million samples per second. Our purpose is to illustrate the benefits of applying both bit-level array architecture and application-specific CAD to the problem of IIR filtering. The resulting CAD system reduces the costs of very high throughput IIR filters with respec...
In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digita...
In this dissertation, architectures, hardware design and prototypes for the realization of 2-D filte...
[[abstract]]Flexible VLSI architectures for realizing high-speed 2-D FIR (finite impulse response) a...
[[abstract]]© 1988 Institute of Electrical and Electronics Engineers - CAD tool is presented for pro...
[[abstract]]An application-specific, very-high-level CAD (computer-aided design) tool is presented f...
[[abstract]]© 1987 Institute of Electrical and Electronics Engineers - A CAD tool is presented for p...
[[abstract]]The authors present an algorithmic and architectural extension to an existing CAD tool t...
The paper presents generator of an infinite impulse response (IIR) digital filter structure for impl...
The implementation phase in the Computer-Aided Design (CAD) of Canonical- Signed Digit (CSD) digital...
This paper reports the development of a highly integrated CAD environment for area efficient impleme...
Automation in VLSI design is a powerful way to simplify the VLSI layout process and will allow for f...
A novel VLSI (Very Large Scale Integration) architecture for real time IIR (Infinite Impulse Respons...
Several novel systolic architectures for implementing densely pipelined bit parallel IIR filter sect...
[[abstract]]Flexible VLSI architectures for high-speed 2-D finite-impulse-response (FIR) and infinit...
In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digita...
In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digita...
In this dissertation, architectures, hardware design and prototypes for the realization of 2-D filte...
[[abstract]]Flexible VLSI architectures for realizing high-speed 2-D FIR (finite impulse response) a...
[[abstract]]© 1988 Institute of Electrical and Electronics Engineers - CAD tool is presented for pro...
[[abstract]]An application-specific, very-high-level CAD (computer-aided design) tool is presented f...
[[abstract]]© 1987 Institute of Electrical and Electronics Engineers - A CAD tool is presented for p...
[[abstract]]The authors present an algorithmic and architectural extension to an existing CAD tool t...
The paper presents generator of an infinite impulse response (IIR) digital filter structure for impl...
The implementation phase in the Computer-Aided Design (CAD) of Canonical- Signed Digit (CSD) digital...
This paper reports the development of a highly integrated CAD environment for area efficient impleme...
Automation in VLSI design is a powerful way to simplify the VLSI layout process and will allow for f...
A novel VLSI (Very Large Scale Integration) architecture for real time IIR (Infinite Impulse Respons...
Several novel systolic architectures for implementing densely pipelined bit parallel IIR filter sect...
[[abstract]]Flexible VLSI architectures for high-speed 2-D finite-impulse-response (FIR) and infinit...
In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digita...
In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digita...
In this dissertation, architectures, hardware design and prototypes for the realization of 2-D filte...
[[abstract]]Flexible VLSI architectures for realizing high-speed 2-D FIR (finite impulse response) a...