MULTIPAR: behavioral partitioning for synthesizing application-specific multiprocessor architecture

[[abstract]]The authors present methods for scheduling and partitioning behavioral descriptions in order to synthesize application specific multiprocessor systems. The target application domain is real-time digital signal processing (DSP). In order to meet the real-time constraints, maximizing the system throughput and minimizing the number of communications between processors are important. A model of the target processor and the communication device is defined as a basis for synthesizing the multiprocessor system. The authors use an integer linear programming formulation to solve the partitioning and scheduling problem simultaneously. The optimization complexity of large applications can be reduced by using a simplified formulation and an iterative partitioning heuristic. The work also takes into account of conditional branches, loops, and critical signals[[fileno]]2030203030052[[department]]資訊工程學