Instruction buffering for nested loops in low power design (Conference)

[[abstract]]Loop buffering techniques have been proposed for reducing power consumption. Although such schemes are effective in reducing power, they work for the innermost loop only. In this paper, we propose a stack-based controller which can deal with nested-loops of all styles, and also the if-then-else construct in a loop. Our experiments, using the Wattch power estimator (D. Brooks et al, Int. Symp. Comp. Architecture, pp. 83-94, 2000), show that the power consumption reduction of our technique at fetch and decode stages is up to 40% when compared to that of previously proposed techniques with the innermost loop only.[[fileno]]2030202030024[[department]]資訊工程學