[[abstract]]In the present invention a built in self test (BIST) for an embedded memory is described. The BIST can be used at higher levels of assembly and for commodity memories to perform functional and AC memory tests. A BIST controller comprising a finite state machine is used to step through a test sequence and control a sequence controller. The sequence controller provides data and timing sequences to the embedded memory to provide page mode and non-page mode tests along with a refresh test. The BIST logic is scan tested prior to performing the built in self test and accommodations for normal memory refresh is made throughout the testing. The BIST also accommodates a burn-in test where unique burn-in test sequences can be applied.[[fi...
Abstract. We have introduced a low-cost at-speed BIST architecture that enables conventional micropr...
[[abstract]]A built-in self-test (BIST) compiler for embedded memories, called BRAINS (Bist for RAm ...
We have developed an algorithm by which to enable conventional microprocessors to test their on-chip...
[[abstract]]In the present invention a built in self test (BIST) for an embedded memory is described...
[[abstract]]© 1999 Institute of Electrical and Electronics Engineers - The programmable BIST design ...
The design and architecture of a reconfigurable memory BIST unit is presented. The proposed memory B...
[[abstract]]© 2001 Institute of Electrical and Electronics Engineers -We present a processor-program...
[[abstract]]© 2000 Institute of Electrical and Electronics Engineers -Testing embedded memories is b...
Abstract—Memory is increasingly important because of the high density of current memory chips. W...
Abstract—As there are increasing functionalities in modern system-on-chip (SOC) design, the amount o...
[[abstract]]A high-speed Built-In Self-Test (BIST) architecture for Dynamic Random Access Memo...
[[abstract]]A high-speed Built-In Self-Test (BIST) design for Dynamic Random Access Memories (DRAMs)...
A programmable built in self test, BIST, system for testing a memory, comprises an instruction regis...
[[abstract]]Embedded memory test and diagnosis is becoming an important issue in system-on-chip (SOC...
[[abstract]]In this paper we propose a novel built-in self-test (BIST) design for embedded SRAM core...
Abstract. We have introduced a low-cost at-speed BIST architecture that enables conventional micropr...
[[abstract]]A built-in self-test (BIST) compiler for embedded memories, called BRAINS (Bist for RAm ...
We have developed an algorithm by which to enable conventional microprocessors to test their on-chip...
[[abstract]]In the present invention a built in self test (BIST) for an embedded memory is described...
[[abstract]]© 1999 Institute of Electrical and Electronics Engineers - The programmable BIST design ...
The design and architecture of a reconfigurable memory BIST unit is presented. The proposed memory B...
[[abstract]]© 2001 Institute of Electrical and Electronics Engineers -We present a processor-program...
[[abstract]]© 2000 Institute of Electrical and Electronics Engineers -Testing embedded memories is b...
Abstract—Memory is increasingly important because of the high density of current memory chips. W...
Abstract—As there are increasing functionalities in modern system-on-chip (SOC) design, the amount o...
[[abstract]]A high-speed Built-In Self-Test (BIST) architecture for Dynamic Random Access Memo...
[[abstract]]A high-speed Built-In Self-Test (BIST) design for Dynamic Random Access Memories (DRAMs)...
A programmable built in self test, BIST, system for testing a memory, comprises an instruction regis...
[[abstract]]Embedded memory test and diagnosis is becoming an important issue in system-on-chip (SOC...
[[abstract]]In this paper we propose a novel built-in self-test (BIST) design for embedded SRAM core...
Abstract. We have introduced a low-cost at-speed BIST architecture that enables conventional micropr...
[[abstract]]A built-in self-test (BIST) compiler for embedded memories, called BRAINS (Bist for RAm ...
We have developed an algorithm by which to enable conventional microprocessors to test their on-chip...