Add to ORKG[[abstract]]A structure of a capacitor includes two gates and a commonly used source/drain region on a substrate. Then, a pitted self align contact window (PSACW) partly exposes the commonly used source/drain region. Then an glue/barrier layer and a lower electrode of the capacitor are over the PSACW. Then a dielectric thin film with a material having high dielectric constant is over the lower electrode. Then, an upper electrode is over the dielectric thin film to complete a capacitor, which has a structure of metal insulator metal with a shape like the PSACW.[[fileno]]2020309060052[[department]]材料科學工程學
An integratable capacitor structure has a substrate on which two capacitor electrode layers separate...
[[abstract]]A method for manufacturing the lower electrode of a DRAM capacitor. The method includes ...
[[abstract]]Within both a method for forming a capacitor and a capacitor formed employing the method...
[[abstract]]A fabricating method of a capacitor includes two gates and a commonly used source/drain ...
[[abstract]]Within a method for fabricating a capacitor structure and a capacitor structure fabricat...
Capacitance of a Three-Dimensional Interdigitated (MIM) Capacitor The geometry considered here was t...
[[abstract]]A method of forming a DRAM includes forming a transfer FET on a substrate, the FET havin...
A capacitive structure is made with thin film capacitor plates substantially surrounding an opening ...
[[abstract]]A high capacitance charge storage capacitor for a DRAM has a lower electrode in contact ...
none3noA capacitive element is manufactured by using the multilayer printed circuit board technology...
[[abstract]]A method for forming a high capacitance charge storage structure that can be applied to ...
[[abstract]]A fabrication method for an integrated device having a capacitor in an interconnect syst...
Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printe...
[[abstract]]The capacitor, e.g. of a DRAM cell, is formed by depositing a first layer of hemispheric...
[[abstract]]A semiconductor fabrication method is provided for the fabrication of a dielectric struc...
An integratable capacitor structure has a substrate on which two capacitor electrode layers separate...
[[abstract]]A method for manufacturing the lower electrode of a DRAM capacitor. The method includes ...
[[abstract]]Within both a method for forming a capacitor and a capacitor formed employing the method...
[[abstract]]A fabricating method of a capacitor includes two gates and a commonly used source/drain ...
[[abstract]]Within a method for fabricating a capacitor structure and a capacitor structure fabricat...
Capacitance of a Three-Dimensional Interdigitated (MIM) Capacitor The geometry considered here was t...
[[abstract]]A method of forming a DRAM includes forming a transfer FET on a substrate, the FET havin...
A capacitive structure is made with thin film capacitor plates substantially surrounding an opening ...
[[abstract]]A high capacitance charge storage capacitor for a DRAM has a lower electrode in contact ...
none3noA capacitive element is manufactured by using the multilayer printed circuit board technology...
[[abstract]]A method for forming a high capacitance charge storage structure that can be applied to ...
[[abstract]]A fabrication method for an integrated device having a capacitor in an interconnect syst...
Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printe...
[[abstract]]The capacitor, e.g. of a DRAM cell, is formed by depositing a first layer of hemispheric...
[[abstract]]A semiconductor fabrication method is provided for the fabrication of a dielectric struc...
An integratable capacitor structure has a substrate on which two capacitor electrode layers separate...
[[abstract]]A method for manufacturing the lower electrode of a DRAM capacitor. The method includes ...
[[abstract]]Within both a method for forming a capacitor and a capacitor formed employing the method...