[[abstract]] A method for forming borderless contact is disclosed. The method includes providing a substrate with active areas and a trench isolation region in which the active areas are silcide. Then, the substrate is nitridized such that a titanium nitride layer is formed on the active areas and a silicon oxynitride is formed on the trench isolation region. A dielectric layer is deposited on the substrate and an opening is etched in the dielectric layer in which the opening overlies both a portion of the trench isolation region and a portion of the active area.[[fileno]]2020309060021[[department]]材料科學工程學
[[abstract]]A method for fabricating a gate structure. The method involves providing a substrate, fo...
[[abstract]]A method for fabricating a shallow trench isolation. A pad oxide layer and a mask layer ...
[[abstract]]A method of fabricating an unlanded metal via of multi-level interconnection. The method...
[[abstract]]A method for forming a barrier layer comprising the steps of first providing a semicondu...
[[abstract]]A method of forming a bonding pad is provided. A substrate is provided and a multi-metal...
[[abstract]]A method of forming an inter-metal interconnection is provided. A substrate is provided....
[[abstract]]A method of manufacturing a contact pad. A substrate having a source/drain region formed...
[[abstract]]The present invention relates to a method of manufacturing semiconductor components havi...
[[abstract]]A method for forming shallow trench isolation is disclosed. The method includes forming ...
[[abstract]]A method for fabricating, a shallow trench isolation structure. A pad oxide layer and a ...
[[abstract]]A method of making vias in a semiconductor IC device having adequate contact to the surf...
In one embodiment, a method for fabricating thin film tunnel devices includes forming multiple botto...
[[abstract]]A method of manufacturing a cobalt suicide layer in the present invention has a silicon ...
[[abstract]]A method for fabricating a semiconductor device. A shallow trench isolation is formed by...
[[abstract]]An improved method for forming shallow trench isolation structure is described. The pres...
[[abstract]]A method for fabricating a gate structure. The method involves providing a substrate, fo...
[[abstract]]A method for fabricating a shallow trench isolation. A pad oxide layer and a mask layer ...
[[abstract]]A method of fabricating an unlanded metal via of multi-level interconnection. The method...
[[abstract]]A method for forming a barrier layer comprising the steps of first providing a semicondu...
[[abstract]]A method of forming a bonding pad is provided. A substrate is provided and a multi-metal...
[[abstract]]A method of forming an inter-metal interconnection is provided. A substrate is provided....
[[abstract]]A method of manufacturing a contact pad. A substrate having a source/drain region formed...
[[abstract]]The present invention relates to a method of manufacturing semiconductor components havi...
[[abstract]]A method for forming shallow trench isolation is disclosed. The method includes forming ...
[[abstract]]A method for fabricating, a shallow trench isolation structure. A pad oxide layer and a ...
[[abstract]]A method of making vias in a semiconductor IC device having adequate contact to the surf...
In one embodiment, a method for fabricating thin film tunnel devices includes forming multiple botto...
[[abstract]]A method of manufacturing a cobalt suicide layer in the present invention has a silicon ...
[[abstract]]A method for fabricating a semiconductor device. A shallow trench isolation is formed by...
[[abstract]]An improved method for forming shallow trench isolation structure is described. The pres...
[[abstract]]A method for fabricating a gate structure. The method involves providing a substrate, fo...
[[abstract]]A method for fabricating a shallow trench isolation. A pad oxide layer and a mask layer ...
[[abstract]]A method of fabricating an unlanded metal via of multi-level interconnection. The method...