[[abstract]]A fabrication method for an integrated device having a capacitor in an interconnect system is described. At least a first exposed metal line and a second metal line are provided in an insulating layer. A stack layer is deposited and patterned to form a film stack structure over the second metal line. An inter-metal dielectric layer is formed over the film stack structure, the first metal line and the insulating layer. At least a first dual damascene interconnect and a second dual damascene interconnect are formed over and in contact with the first metal line and the film stack structure, respectively.[[fileno]]2020309060005[[department]]材料科學工程學
[[abstract]]A method for forming a DRAM capacitor whose titanium nitride electrode is fabricated in ...
[[abstract]]A method for fabricating a capacitor of a DRAM includes a lower conductive layer of the ...
Forming an interconnect of a semiconductor device includes defining a recessed structure proximate t...
[[abstract]]A fabricating method of a capacitor includes two gates and a commonly used source/drain ...
[[abstract]]A dielectric layer in a dual-damascene interconnect is described. A dual-damascene inter...
A method of manufacturing a capacitor on a wafer, and an IC comprising such a capacitor is disclosed...
A method of creating a capacitor in an integrated circuit. According to a basic version of the inven...
[[abstract]]A method of manufacturing copper interconnects includes the steps of first providing a s...
[[abstract]]A structure of a capacitor includes two gates and a commonly used source/drain region on...
Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printe...
[[abstract]]A method of forming an inter-metal interconnection is provided. A substrate is provided....
[[abstract]]Within a method for fabricating a capacitor structure and a capacitor structure fabricat...
[[abstract]]A method for forming a dielectric-constant-enhanced capacitor is provided. A wafer in a ...
[[abstract]] An improved dual damascene structure is provided for use in the wiring-line structures ...
An integratable capacitor structure has a substrate on which two capacitor electrode layers separate...
[[abstract]]A method for forming a DRAM capacitor whose titanium nitride electrode is fabricated in ...
[[abstract]]A method for fabricating a capacitor of a DRAM includes a lower conductive layer of the ...
Forming an interconnect of a semiconductor device includes defining a recessed structure proximate t...
[[abstract]]A fabricating method of a capacitor includes two gates and a commonly used source/drain ...
[[abstract]]A dielectric layer in a dual-damascene interconnect is described. A dual-damascene inter...
A method of manufacturing a capacitor on a wafer, and an IC comprising such a capacitor is disclosed...
A method of creating a capacitor in an integrated circuit. According to a basic version of the inven...
[[abstract]]A method of manufacturing copper interconnects includes the steps of first providing a s...
[[abstract]]A structure of a capacitor includes two gates and a commonly used source/drain region on...
Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printe...
[[abstract]]A method of forming an inter-metal interconnection is provided. A substrate is provided....
[[abstract]]Within a method for fabricating a capacitor structure and a capacitor structure fabricat...
[[abstract]]A method for forming a dielectric-constant-enhanced capacitor is provided. A wafer in a ...
[[abstract]] An improved dual damascene structure is provided for use in the wiring-line structures ...
An integratable capacitor structure has a substrate on which two capacitor electrode layers separate...
[[abstract]]A method for forming a DRAM capacitor whose titanium nitride electrode is fabricated in ...
[[abstract]]A method for fabricating a capacitor of a DRAM includes a lower conductive layer of the ...
Forming an interconnect of a semiconductor device includes defining a recessed structure proximate t...