[[abstract]]This study presents a novel system architecture to implement silicon-on-glass (SOG) MEMS devices on Si–glass compound substrate with embedded silicon vias. Thus, the 3D integration of MEMS devices can be accomplished by means of through-wafer silicon vias. The silicon vias connecting to the pads of devices are embedded inside the Pyrex glass. Parasitic capacitance for both vias and microstructures is decreased and mismatch of coefficient of thermal expansion (CTE) is reduced. In applications, the glass reflow process together with the SOG micromachining processes were employed to implement the presented concept. Successful driving of the resonator through the silicon vias is demonstrated. The wafer-level hermetic packaging can b...
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with ...
This paper gives an overview about possibilities for wafer level encapsulation of surface micromachi...
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with ...
[[abstract]]Packaging is an emerging technology for microsystem integration. The silicon-on-insulato...
A MEMS fabrication process with through-glass vias (TGVs) by laser drilling was presented, and relia...
Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs...
IEEEThis paper introduces a novel, inherently simple, and all-silicon wafer-level fabrication and he...
Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs...
Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs...
[[abstract]]This study presents a novel process to realize glass 2D-microprobe array. The through si...
We have developed a novel (silicon-on-insulator (SOI), microelectromechanical systems (MEMS)) SOI-ME...
Technologies for 3D-Wafer Level Packing (WLP) of Micro electro Mechanical Systems (MEMS) are describ...
A low-cost, hermetic wafer-level packaging solution with negligible parasitics suitable for MEMS res...
This paper will present wafer level packaging approaches and results for MEMS encapsulation and inte...
In the past decade wafer level packaging (WLP) has been proven to be a very competitive solution reg...
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with ...
This paper gives an overview about possibilities for wafer level encapsulation of surface micromachi...
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with ...
[[abstract]]Packaging is an emerging technology for microsystem integration. The silicon-on-insulato...
A MEMS fabrication process with through-glass vias (TGVs) by laser drilling was presented, and relia...
Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs...
IEEEThis paper introduces a novel, inherently simple, and all-silicon wafer-level fabrication and he...
Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs...
Novelty / Progress Claims We have developed a new method for fabrication of through-glass vias (TGVs...
[[abstract]]This study presents a novel process to realize glass 2D-microprobe array. The through si...
We have developed a novel (silicon-on-insulator (SOI), microelectromechanical systems (MEMS)) SOI-ME...
Technologies for 3D-Wafer Level Packing (WLP) of Micro electro Mechanical Systems (MEMS) are describ...
A low-cost, hermetic wafer-level packaging solution with negligible parasitics suitable for MEMS res...
This paper will present wafer level packaging approaches and results for MEMS encapsulation and inte...
In the past decade wafer level packaging (WLP) has been proven to be a very competitive solution reg...
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with ...
This paper gives an overview about possibilities for wafer level encapsulation of surface micromachi...
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with ...