[[abstract]]©2001 IEICE-The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the ...
Design of multiple outputs CMOS combinational gates is studied. Two techniques for minimization of m...
Redundancy Addition and Removal (RAR) is a restructur-ing technique used in the synthesis and optimi...
In the paper we consider fast transformation of a multilevel and multioutput circuit with AND, OR an...
[[abstract]]The alternative wire technique attempts to replace a target wire by another wire without...
[[abstract]]In this paper, we discuss the theorems and extensions of single alternative wire that at...
[[abstract]]In this paper, we propose a layout-driven synthesis approach for field programmable gate...
[[abstract]]This paper presents a logic restructuring technique named node addition and removal (NAR...
[[abstract]]In this paper, we present logic optimization techniques for multilevel combinational net...
[[abstract]]This paper presents a very efficient optimization method suitable for multilevel combina...
[[abstract]]Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis...
[[abstract]]In this article we present a new approach to the problem of local logic transformation f...
[[abstract]]In this paper, we discuss the problem of optimizing a multi-level logic combinational Bo...
[[abstract]]In this paper, we propose a layout driven synthesis approach for Field Programmable Gate...
In this paper, we propose a new methodology to inte-grate multiple circuit tranformations and routin...
[[abstract]]©1998 IEEE-Redundancy removal is an important step in combinational logic optimization. ...
Design of multiple outputs CMOS combinational gates is studied. Two techniques for minimization of m...
Redundancy Addition and Removal (RAR) is a restructur-ing technique used in the synthesis and optimi...
In the paper we consider fast transformation of a multilevel and multioutput circuit with AND, OR an...
[[abstract]]The alternative wire technique attempts to replace a target wire by another wire without...
[[abstract]]In this paper, we discuss the theorems and extensions of single alternative wire that at...
[[abstract]]In this paper, we propose a layout-driven synthesis approach for field programmable gate...
[[abstract]]This paper presents a logic restructuring technique named node addition and removal (NAR...
[[abstract]]In this paper, we present logic optimization techniques for multilevel combinational net...
[[abstract]]This paper presents a very efficient optimization method suitable for multilevel combina...
[[abstract]]Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis...
[[abstract]]In this article we present a new approach to the problem of local logic transformation f...
[[abstract]]In this paper, we discuss the problem of optimizing a multi-level logic combinational Bo...
[[abstract]]In this paper, we propose a layout driven synthesis approach for Field Programmable Gate...
In this paper, we propose a new methodology to inte-grate multiple circuit tranformations and routin...
[[abstract]]©1998 IEEE-Redundancy removal is an important step in combinational logic optimization. ...
Design of multiple outputs CMOS combinational gates is studied. Two techniques for minimization of m...
Redundancy Addition and Removal (RAR) is a restructur-ing technique used in the synthesis and optimi...
In the paper we consider fast transformation of a multilevel and multioutput circuit with AND, OR an...