H.264/AVC Decoder Realization on a SoC Platform

[[abstract]]©2007 CSREA-This paper presents a H.264/AVC decoder realization on a dual-core SoC platform by the well-designed macroblock level software partitioning. Furthermore, optimization techniques for computation- intensive procedures on a VLIW PAC DSP are captured. The evaluation results show that a video with D1 resolution can be decoded in real-time by the implementation, which provides a valuable experience for similar designs.[[department]]資訊工程學