A unified systolic array design for wavelet-based video codec

[[abstract]]In wavelet-based video compression, some kernel functions such as block matching, discrete wavelet transform, are essential but with large complexity in computation. If we dissect two functions into the basic matrix-vector product forms, a unified design for them becomes feasible. In this paper, with carefully extraction the common computation component, a unified one-dimensional systolic array that can perform block matching and wavelet transform is presented. In this design, the input data is serial-in to save the amount of required pins, the data flow are carefully arranged to simplify the interconnection between computation components. Unlike the other full-search block matching hardware, it does not require either data broadcasting or the parallel adder. When executing a wavelet transform, the data flow is scheduled simply and effectively. It does not require any interconnecting network or off-chip memory to store intermediate results[[fileno]]2030211030050[[department]]資訊工程學