[[abstract]]A memory device using silicon rich oxide (SRO) as the charge trapping layer for dynamic or quasi-nonvolatile memory application is proposed. The device achieved write and erase speed at low voltage comparable to that of a dynamic-random-access memory (DRAM) cell with a much longer data retention time. This device has a SRO charge trapping layer on top of a very thin tunneling oxide (<2 nm). Using the traps in the SRO layer for charge storage, a symmetrical write/erase characteristics were achieved. This new SRO cell has an erase time much shorter than values of similar devices reported in the literature[[fileno]]2030158010043[[department]]電機工程學
This paper presents recent progress in resistive oxide memories and their integration into advanced ...
This paper presents a novel flash memory cell based on localized charge trapping in a dielectric lay...
This paper presents a low-leakage 128 kbit dynamic memory based on a 2T dynamic cell. The design is ...
[[abstract]]© 1999 Institute of Electrical and Electronics Engineers-A memory device using silicon r...
The induced changes of the flatband voltage by the location of holes in a silicon-rich oxide (SRO) f...
[[abstract]]Thin silicon-rich-oxide (SRO) film can be an efficient and reliable tunneling injector f...
The charge-trapping properties of band-engineered SrTiO3/HfON stack were investigated by using the A...
Charge-trapping devices using multilayered dielectrics were studied for nonvolatile memory applicati...
Oxide-based two-terminal resistive random access memory (RRAM) is considered one of the most promisi...
The charge-trapping properties of band-engineered SrTiO 3/HfON stack were investigated by using the ...
Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized wit...
Abstract—We report an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor nonvolatile ...
Silicon quantum dots have been deposited on top of a 3-nm tunnel oxide by Low Pressure Chemical Vapo...
Combining the advantages of low-power consumption of static random access memory (SRAM) with high st...
A new concept of a tunneling oxide-free nonvolatile memory device with a deep trap interface floatin...
This paper presents recent progress in resistive oxide memories and their integration into advanced ...
This paper presents a novel flash memory cell based on localized charge trapping in a dielectric lay...
This paper presents a low-leakage 128 kbit dynamic memory based on a 2T dynamic cell. The design is ...
[[abstract]]© 1999 Institute of Electrical and Electronics Engineers-A memory device using silicon r...
The induced changes of the flatband voltage by the location of holes in a silicon-rich oxide (SRO) f...
[[abstract]]Thin silicon-rich-oxide (SRO) film can be an efficient and reliable tunneling injector f...
The charge-trapping properties of band-engineered SrTiO3/HfON stack were investigated by using the A...
Charge-trapping devices using multilayered dielectrics were studied for nonvolatile memory applicati...
Oxide-based two-terminal resistive random access memory (RRAM) is considered one of the most promisi...
The charge-trapping properties of band-engineered SrTiO 3/HfON stack were investigated by using the ...
Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized wit...
Abstract—We report an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor nonvolatile ...
Silicon quantum dots have been deposited on top of a 3-nm tunnel oxide by Low Pressure Chemical Vapo...
Combining the advantages of low-power consumption of static random access memory (SRAM) with high st...
A new concept of a tunneling oxide-free nonvolatile memory device with a deep trap interface floatin...
This paper presents recent progress in resistive oxide memories and their integration into advanced ...
This paper presents a novel flash memory cell based on localized charge trapping in a dielectric lay...
This paper presents a low-leakage 128 kbit dynamic memory based on a 2T dynamic cell. The design is ...