An Automated Test Framework for Experimenting with Stochastic Behavior in Reconfigurable Logic

In this paper, we present an automated test frame-work for the characterization of stochastic behavior in logiccircuits. The framework is intended as a platform for experimenting with and providing statistics on digital architectures givenbehavioral uncertainties at the gate-level. As an experimentalplatform, we propose to use an FPGA due to the proven valueof reconfigurable architectures in design space exploration. Wehypothesize that stochastic behavior can be introduced in FPGAsusing external noise sources; a fact that is later confirmed bycharacterizing the behavior of an FPGA IO block subject tovoltage/frequency scaling and Vdd -noise. The framework provideseasy interfacing with laboratory equipment, design of experimentcapabilities and automatic test execution, thus providing a powerful tool for characterizing stochastic behavior in reconfigurablelogic.