Digital carrier modulation and sampling issues of matrix converters

Although the modulation of ac-ac matrix converters using space vector theory has long been established, their carrier-based modulation principles have only recently attracted some attention. Reasons commonly stated for evaluating the carrier-based alternative include simpler converter control because of its inherent auto-sequencing process, and easier implementation using fast on-chip timers embedded in most modern digital signal processors. Motivated by these likely merits, which have previously been proven for dc-ac inverters, an investigation is now pursued here to develop appropriate digital carrier modulation schemes for controlling conventional and sparse matrix converters with minimized semiconductor commutation count and smooth sextant transitions with no erroneous states produced. For guaranteeing the latter two features, correct digital sampling instants and state sequence reversal must be chosen appropriately, as demonstrated in the paper for the two different topological options, which to date, have not yet been discussed in the existing literature. To validate the concepts discussed, experimental testing on the implemented conventional and sparse matrix laboratory prototypes was performed with their respective results captured and presented in the paper for visual confirmation.Although the modulation of ac-ac matrix converters using space vector theory has long been established, their carrier-based modulation principles have only recently attracted some attention. Reasons commonly stated for evaluating the carrier-based alternative include simpler converter control because of its inherent auto-sequencing process, and easier implementation using fast on-chip timers embedded in most modern digital signal processors. Motivated by these likely merits, which have previously been proven for dc-ac inverters, an investigation is now pursued here to develop appropriate digital carrier modulation schemes for controlling conventional and sparse matrix converters with minimized semiconductor commutation count and smooth sextant transitions with no erroneous states produced. For guaranteeing the latter two features, correct digital sampling instants and state sequence reversal must be chosen appropriately, as demonstrated in the paper for the two different topological options, which to date, have not yet been discussed in the existing literature. To validate the concepts discussed, experimental testing on the implemented conventional and sparse matrix laboratory prototypes was performed with their respective results captured and presented in the paper for visual confirmation