Open-source RISC-V Input/Output Memory Management Unit (IOMMU) IP

This work describes the design and implementation of an open-source IOMMU IP compliant with the ratified version of the RISC-V IOMMU specification (v1.0-rc1). So far, we have designed and implemented a basic IP encompassing only the mandatory features (of the spec) and support for virtualization. which has been successfully validated and evaluated on a single-core CVA6-based SoC. Moving forward, we plan to extend the IP with more advanced features, i.e., optional features such as a hardware performance monitor, memory-resident interrupt files support, etc. We will open-source our IP to the RISC-V community