Reconfigurable Logic‐In‐Memory Cell Comprising Triple‐Gated Feedback Field‐Effect Transistors

Abstract A reconfigurable logic‐in‐memory (R‐LIM) cell performs logic‐in‐memory functions as well as reconfigurable logic gates. The R‐LIM cell is constructed with triple‐gated (TG) feedback field‐effect transistors (FBFETs) that are reconfigured in n‐channel or p‐channel modes via electrostatic doping. Each TG FBFET has one control gate electrode and two program‐gate electrodes that determine the channel mode. Their reconfigurability enables the symmetrical operation of the n‐channel and p‐channel modes through an on‐current ratio of 1:04. Furthermore, the R‐LIM cell performs eight Boolean logic operations, storing the logic outputs for ≈100 s under zero‐bias conditions. The R‐LIM cell is useful for developing in‐memory computing systems with high energy efficiency and functional logic