ASTRE: ASIC with switched capacitor array (SCA) and trigger for detector readout electronics hardened against Single Event Latchup (SEL)

International audienceFor measuring gamma rays from low energy to high energy and cover the gap between 1 MeV and 300 MeV in space measurements, Time Projection Chambers (TPC) are a promising solution. In order to read the data out of these TPCs, one needs a dedicated electronics to be flexible to cover a wide range of detectors types, with a good resolution over a large dynamic range of incoming charges. The ASTRE chip, a radiation tolerant chip for these applications is described in this article. This Application Specified Integrated Circuit (ASIC) permits the amplification, filtering, triggering and analog storage of 512 samples at a flexible sampling frequency up to 100 MHz. The power consumption is less than 10 mW/channel, with 64 channels per ASIC. The charge range of ASTRE is from 120 fC to 10 pC with 4 programmable gains. The filtering supports 16 peaking times (from 60 ns to ). The ASIC can read negative or positive signals and return a multiplicity signal for triggering and selective readout. In addition it has a programmable internal trigger readable with Low Differential Voltage Signal (LVDS) outputs. The chip was fabricated in August 2016 and is under test. The results of this ASIC to Single Event Latchups, made at the Universite Catholique de Louvain (UCL) are detailed below