Fingerprinting SoC FPGA via Measuring Communication Link

ABSTRACTFingerprinting SoC FPGA via Measuring Communication LinkOver the past few decades, Field Programmable Gate Arrays (FPGAs) have found widespread application in various fields, including signal processing, hardware acceleration, machine learning, etc. To address the requirements of heterogeneous computing, a new category of devices called System-on-Chip FPGAs (SoC-FPGAs) has emerged. These devices combine the capabilities of microcontrollers and FPGAs to leverage the advantages offered by both general-purpose CPUs and FPGAs. However, the introduction of SoC-FPGAs also introduces potential security vulnerabilities since both CPUs and FPGAs are impressionable to side-channel attacks. On SoC-FPGAs, the CPUs and FPGAs are connected through the communication link, which can be utilized as an attacking interface for such side-channel attacks. In this paper, we proposed such side-channel attacks targeting SoC-FPGAs to fingerprint the hardware accelerators running on them by measuring the communication link. We implemented a benchmark program that stresses the communication link and records the I/O bandwidth of the running accelerators. After analyzing the collected data traces using machine learning classifiers, we successfully distinguished the unique I/O pattern of different victim accelerators. Our highest classification accuracy result is 93.3% with a random forest classifier, and it proved that attackers could use such an attack to perform accelerator fingerprinting on SoC-FPGAs. As far as we know, this is the first attack by which fingerprinting accelerator on SoC-FPGAs via measuring communication link