This paper presents a method of test program generation for software-based self-test of pipelined processors. We propose a model of pipelined processors and testability measures for registers. We generate a test program efficiently by means of specific behaviors of pipelined processors and combinational ATPG. Experimental results show that the proposed method obtains high fault efficiency.http://library.naist.jp/mylimedio/dllimedio/show.cgi?bookid=100049919&oldid=9221
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach...
Embedded processor testing techniques based on the execution of self-test routines, have been recent...
The ever increasing usage of microprocessor devices is sustained by a high volume production that in...
Abstract—Embedded processor testing techniques based on the execution of self-test programs have bee...
Software-based self-test (SBST) techniques are used to test processors and processor cores against p...
Abstract. Processor testing approaches based on the execution of self-test programs have been recent...
Software-Based Self-Test (SBST) approaches have shown to be an effective solution to detect permane...
Very Long Instruction Word (VLIW) processors are increasingly employed in a large range of embedded ...
International audienceSoftware-Based Self-Test (SBST) approaches have shown to be an effective solut...
Software-Based Self-Test (SBST) approaches have shown to be an effective solution to detect permanen...
Abstract—Software-based self-test (SBST) is a promising new technology for at-speed testing of embed...
Software-based self-test (SBST) techniques are used to test processors against permanent faults intr...
This paper proposes a graph theoretic model based systematic approach for the delay fault testing of...
Testing is a crucial issue in SOC development and production process. A popular solution for SOCs th...
Software self-testing for embedded processor cores based on their instruction set, is a topic of inc...
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach...
Embedded processor testing techniques based on the execution of self-test routines, have been recent...
The ever increasing usage of microprocessor devices is sustained by a high volume production that in...
Abstract—Embedded processor testing techniques based on the execution of self-test programs have bee...
Software-based self-test (SBST) techniques are used to test processors and processor cores against p...
Abstract. Processor testing approaches based on the execution of self-test programs have been recent...
Software-Based Self-Test (SBST) approaches have shown to be an effective solution to detect permane...
Very Long Instruction Word (VLIW) processors are increasingly employed in a large range of embedded ...
International audienceSoftware-Based Self-Test (SBST) approaches have shown to be an effective solut...
Software-Based Self-Test (SBST) approaches have shown to be an effective solution to detect permanen...
Abstract—Software-based self-test (SBST) is a promising new technology for at-speed testing of embed...
Software-based self-test (SBST) techniques are used to test processors against permanent faults intr...
This paper proposes a graph theoretic model based systematic approach for the delay fault testing of...
Testing is a crucial issue in SOC development and production process. A popular solution for SOCs th...
Software self-testing for embedded processor cores based on their instruction set, is a topic of inc...
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach...
Embedded processor testing techniques based on the execution of self-test routines, have been recent...
The ever increasing usage of microprocessor devices is sustained by a high volume production that in...