A 4.2–13.2 V, on-chip, regulated, DC–DC converter in a standard 1.8V/3.3V CMOS process

This paper presents a fully on-chip HV-regulated DC–DC boost converter for the power management unit of an electrical neural stimulator. The core of the DC–DC converter consists of a 4x4 array of individually-configurable charge pumps. The rows and columns of the array can be dynamically enabled or disabled, thus extending the range of suitable output voltages and load currents. Additionally, the converter includes a feedback loop for output voltage regulation which allows responding to abrupt changes in the load current within a few microseconds. The circuit has been designed in a standard 180 nm 1.8V/3.3V CMOS process and occupies an active area of 2.1 mm2. An exhaustive experimental characterization of the proposed circuit was carried out. Experimental results demonstrate that, for an input voltage of 3 V, the DC–DC converter’s regulated output ranges from 4.2 V to 13.2 V under load currents of 0.1–4 mA. Maximum delivered power is around 48 mW. The power efficiency of the converter at the highest achievable output voltage under a 4 mA load current is higher than 65% for input voltages above 2.4 V.This work was supported by grant PID2019-110410RB-I00, funded by MCIN/AEI; and by grant 310 N00014-19-12156, funded by US Office of Naval Research. David Palomeque-Mangut’s work has been supported by the Spanish Government (FPU18/00247).Peer reviewe