Revisiting the Massive Memory Machine for Processing in Memory

Many of the modern problems in computing are, due to their nature, memory-bound. This essentially means that adding more and more computing power, ie., more and faster CPUs, would not allow them to run faster, as one would expect since the bottleneck is the movement of the data from memory to the CPU, which can also be costly in terms of energy consumption. This thesis investigates a collection of ideas that aim to efficiently tackle such problems, such as the Massive Memory Machine, its successor DataScalar architectures, Processing in Memory architectures, and Memory interleaving. The thesis describes an attempt to implement the Massive Memory Machine on the Champsim simulator. It also explains why the DAMOV simulator and UPMEM PIM architecture can not support the Massive Memory Machine, due to lack of communication provided between CPUs. The Massive Memory Machine improved the performance of the programs that were tested. Although the performance did not scale linearly with the number of CPUs added, it improved sufficiently.