This paper presents a novel benchmark synthesis framework with three key features. First, it generates synthetic benchmarks in a high-level programming language (C in our case), in contrast to prior work in benchmark synthesis which generates synthetic benchmarks in assembly. Second, the synthetic benchmarks hide proprietary information from the original workloads they are built after. Hence, companies may want to distribute synthetic benchmark clones to third parties as proxies for their proprietary codes; third parties can then optimize the target system without having access to the original codes. Third, the synthetic benchmarks are shorter running than the original workloads they are modeled after, yet they are representative. In summar...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
Tuning hardwired compiler optimizations for rapidly evolving hardware makes porting an optimizing co...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
This paper presents a novel benchmark synthesis framework with three key features. First, it generat...
Benchmarks set standards for innovation in computer architecture research and industry product devel...
Benchmarks that closely match the behavior of production workloads are crucial to design and provisi...
Benchmarks set standards for innovation in computer architecture research and industry product devel...
Developing an optimizing compiler for a newly proposed architecture is ex-tremely difficult when the...
This paper introduces a methodology to reduce the overall simulation time of large benchmarking suit...
A methodology is introduced to reduce the overall simulation time of large benchmarking suites. Prev...
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when ther...
Comparing the performance of programming languages is difficult because they differ in many aspects ...
Designing new microprocessors is a time consuming task. Architects rely on slow simulators to evalua...
This PhD thesis [1], awarded with the SPEC Distinguished Dissertation Award 2011, proposes and studi...
Predictive modeling using machine learning is an effective method for building compiler heuristics, ...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
Tuning hardwired compiler optimizations for rapidly evolving hardware makes porting an optimizing co...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
This paper presents a novel benchmark synthesis framework with three key features. First, it generat...
Benchmarks set standards for innovation in computer architecture research and industry product devel...
Benchmarks that closely match the behavior of production workloads are crucial to design and provisi...
Benchmarks set standards for innovation in computer architecture research and industry product devel...
Developing an optimizing compiler for a newly proposed architecture is ex-tremely difficult when the...
This paper introduces a methodology to reduce the overall simulation time of large benchmarking suit...
A methodology is introduced to reduce the overall simulation time of large benchmarking suites. Prev...
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when ther...
Comparing the performance of programming languages is difficult because they differ in many aspects ...
Designing new microprocessors is a time consuming task. Architects rely on slow simulators to evalua...
This PhD thesis [1], awarded with the SPEC Distinguished Dissertation Award 2011, proposes and studi...
Predictive modeling using machine learning is an effective method for building compiler heuristics, ...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...
Tuning hardwired compiler optimizations for rapidly evolving hardware makes porting an optimizing co...
DARPA’s AACE project aimed to develop Architecture Aware Compiler Environments. Such a compiler auto...