Large-swing DACS for 56+ GBaud Optical Modulator Applications

A new large-swing digital to analog converter is proposed based on series-stacked cascode CMOS inverters for directly driving optical modulators at 56 GBaud and higher symbol rates. A 4.6-Vppd 56-64 GS/s 6-bit digital-to-analog converter (DAC) along with support circuitry was fabricated in a production 22nm (FDSOI) CMOS technology. To the author’s knowledge, this is the first circuit to transform the single input series-stacked cascode power amplifier topology into a large-swing DAC topology with the use of gate-finger segmentation on the input PMOS and NMOS transistors. It achieves the highest symbol rate and efficiency in CMOS to date. Measurements show the DAC achieving 0.4-Vpp per-side 66-Gb/s NRZ, 0.75-Vpp per-side 62-GBaud 3-PAM, 1.1-Vpp per-side 60-GBaud 4-PAM, 2.3-Vpp per-side 52-GBaud 4-PAM, and 1.38-Vpp per-side 56-GBaud 5-PAM eye diagrams. The power consumption of the DAC and all on-chip support circuitry is 450 mW. Alone, the DAC output stage consumes only 168 mW.M.A.S