Parallel Architecture Exploration for Data-intensive Applications

The work presented in this thesis focuses on the exploration of alternative architectures and computer paradigms for data-intensive applications. Our goal is to design and build a scalable and low-power solution to the emerging high-volume, low locality problem. Instead of parting from an existent computer architecture or trying to adapt and accelerate an existing implementation, our approach is to extract the essential requirements of data-intensive applications to turn them into easy to scale building blocks that can make better use of new,highly parallelizable technologies. This work is divided into two main components. First, Compass, an architecture-agnostic simulation framework. Compass allows the modeling of the functions performed by a data-intensive application without the need of defining an underlying architecture. We focus on a specific type of data-intensive application: the in-memory store, due to the challenges and possibilities it presents. The second component of the research is Prismatic, a hardware architecture for data-intensive applications. To test Prismatic, we create a key-value in-memory store based on the results we obtained from Compass. In this store, small modules perform individual tasks to attend a request from a client. When new data arrives, these modules try to hold the necessary resources in the system, and perform their function to then pass the output to the modules in the following stage. We implement Prismatic in an FPGA board using the relatively new High Bandwidth Memory, which offers 32 independent memory channels. Prismatic is able to attend requests from remote clients through TCP/IP. Our proof-of-concept in-memory store is compatible with the Memcached binary protocol, so both clients and benchmark tools that support this protocol can interact with our system.Ph.D