Historically, energy constrained devices (ECDs) have favored simple in-order pipelines over out-of-order (OoO) ones due to lower energy consumption. While prior research has focused on optimizing in-order compute architectures, not a lot of work exists on adapting OoO pipelines for ECDs. This thesis aims to help enable speculative execution and OoO processing to increase performance on such devices. Memory dependence prediction (MDP) is one such mechanism used for achieving these goals. This thesis leverages prior work and applies machine learning to uncover new MDP designs. A novel perceptron MDP is first developed that almost matches the performance of Store Sets, a state of the art MDP. The insights gained during the process lead to a mu...
This disclosure describes techniques to predict power consumption of a computing device under design...
Efficient data supply to the processor is the one of the keys to achieve high performance. However, ...
A larger instruction window on Out-of-Order (OoO) cores facilitates better exploitation of inherent ...
As the existing techniques that empower the modern high-performance processors are being refined and...
Future multi-core and many-core processors are likely to contain one or more high performance out-of...
International audienceMemory Dependency Prediction (MDP) is paramount to good out-of-order performan...
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs ...
Abstract—The microarchitectural design space of a new processor is too large for an architect to eva...
Energy and power are the main design constraints for modern high-performance computing systems. Inde...
In recent years, highly accurate branch predictors have been proposed primarily for high performance...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the size...
Dynamic Performance Scaling is highly efficient in reducing power consumption of computers. However,...
Memory dependence prediction allows out-of-order is-sue processors to achieve high degrees of instru...
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruc...
Power consumption has became a critical concern in modern computing systems for various reasons incl...
This disclosure describes techniques to predict power consumption of a computing device under design...
Efficient data supply to the processor is the one of the keys to achieve high performance. However, ...
A larger instruction window on Out-of-Order (OoO) cores facilitates better exploitation of inherent ...
As the existing techniques that empower the modern high-performance processors are being refined and...
Future multi-core and many-core processors are likely to contain one or more high performance out-of...
International audienceMemory Dependency Prediction (MDP) is paramount to good out-of-order performan...
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs ...
Abstract—The microarchitectural design space of a new processor is too large for an architect to eva...
Energy and power are the main design constraints for modern high-performance computing systems. Inde...
In recent years, highly accurate branch predictors have been proposed primarily for high performance...
CMOS technology scaling improves the speed and functionality of microprocessors by reducing the size...
Dynamic Performance Scaling is highly efficient in reducing power consumption of computers. However,...
Memory dependence prediction allows out-of-order is-sue processors to achieve high degrees of instru...
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruc...
Power consumption has became a critical concern in modern computing systems for various reasons incl...
This disclosure describes techniques to predict power consumption of a computing device under design...
Efficient data supply to the processor is the one of the keys to achieve high performance. However, ...
A larger instruction window on Out-of-Order (OoO) cores facilitates better exploitation of inherent ...