Impact of FPGA Architectures on Area and Performance of CGRA Overlays

We investigate Coarse-Grained Reconfgurable Arrays (CGRAs) and synthesize them as overlays on Field-Programmable Gate Arrays (FPGAs), and consider the impact of the underlying FPGA architecture on the performance and area of the produced CGRA overlay. This work extends the open-source CGRA modelling and exploration framework, CGRA-ME, to allow for quick generation of vendor-specific CGRA FPGA-overlays. Performance and area are measured and compared to the naive case CGRA implementation, where the naive case does not attempt to leverage unique FPGA architectural features. Results show a significant improvement over the naive case when CGRA FPGA-overlays are created with the FPGA architecture in mind. By offering quick, architecture-specific CGRA FPGA-overlay generation through CGRA-ME, a designer can physically model these architectures on FPGA platforms, with improved performance and area when compared to a naive implementation.M.A.S