Technology scaling along with power and thermal limitations ushers the industry to the many-core system era. Thread level parallelism and complex applications demand a communication architecture that can provide high bandwidth communication and facilitate efficient usage of the computational units. Therefore, the communication architecture plays a major role in the performance of applications and the energy expended on data movements. The communication framework can be viewed at: 1) the interconnect infrastructure (physical) level and, 2) the inter-thread communication (logical) level. This thesis offers three different approaches to address the communication issues in many-core systems at the physical and the logical levels. First, we prop...
2015 Spring.Includes bibliographical references.Future applications running on chip multiprocessors ...
As technology scales into deep submicron domains, electrical wires start to face critical challenges...
There is still a significant gap between the optical network-on-chip (NoC) concept and a mature inte...
Technology scaling along with power and thermal limitations ushers the industry to the many-core sys...
The performance of multiprocessor systems, such as chip multiprocessors (CMPs), is determined not on...
This report explores the work done on optimising Optical Network on Chip (ONoC) routing by minimisin...
Communication contention and thermal susceptibility are two potential issues in optical network-on-c...
In this dissertation, we address the on-chip cross-core and -memory interconnection problem facing f...
Modern chips include several processors that communicate through an interconnection network, which h...
Continuous semiconductor technology scaling and the rapid increase in computational needs have stimu...
For most of the history of computing, transistors have been expensive while wires have been cheap. C...
Optical network-on-chip (ONoC) architecture offers ultrahigh bandwidth, low latency, and low power d...
Dark silicon is the phenomenon that a fraction of many-core chip has to be turned off or run in a lo...
Thesis (Ph.D.), Electrical Engineering, Washington State UniversityAs the demand for high performanc...
Parallel computer systems built with multiprocessors have become ubiquitous in all high-performance ...
2015 Spring.Includes bibliographical references.Future applications running on chip multiprocessors ...
As technology scales into deep submicron domains, electrical wires start to face critical challenges...
There is still a significant gap between the optical network-on-chip (NoC) concept and a mature inte...
Technology scaling along with power and thermal limitations ushers the industry to the many-core sys...
The performance of multiprocessor systems, such as chip multiprocessors (CMPs), is determined not on...
This report explores the work done on optimising Optical Network on Chip (ONoC) routing by minimisin...
Communication contention and thermal susceptibility are two potential issues in optical network-on-c...
In this dissertation, we address the on-chip cross-core and -memory interconnection problem facing f...
Modern chips include several processors that communicate through an interconnection network, which h...
Continuous semiconductor technology scaling and the rapid increase in computational needs have stimu...
For most of the history of computing, transistors have been expensive while wires have been cheap. C...
Optical network-on-chip (ONoC) architecture offers ultrahigh bandwidth, low latency, and low power d...
Dark silicon is the phenomenon that a fraction of many-core chip has to be turned off or run in a lo...
Thesis (Ph.D.), Electrical Engineering, Washington State UniversityAs the demand for high performanc...
Parallel computer systems built with multiprocessors have become ubiquitous in all high-performance ...
2015 Spring.Includes bibliographical references.Future applications running on chip multiprocessors ...
As technology scales into deep submicron domains, electrical wires start to face critical challenges...
There is still a significant gap between the optical network-on-chip (NoC) concept and a mature inte...