The Runahead Network-on-chip

With more cores per chip multiprocessor and higher memory demands from applications, it is imperative that networks-on-chip (NoC) provides low-latency, power-efficient communication. Conventional NoCs tend to be over-provisioned for worst-case bandwidth demands. This results in ineffective use of network resources and power inefficiency. In terms of performance, low-latency techniques often introduce overheads and incur complexity in the router microarchitecture. We find that both low latency and power efficiency is possible by relaxing the constraint of lossless communication. We propose the Runahead NoC, a lightweight, lossy network that provides single-cycle hops. Allowing for lossy delivery makes it possible to design an extremely simple bufferless router microarchitecture. The Runahead NoC operates either as a power-saver to improve power-efficiency, or as an accelerator to provide ultra-low latency communication for selected packets. The Runahead NoC reduces network power consumption by 1.80x as a power-saver and improves latency by 1.66x as an accelerator.M.A.S