Generating Circuit Current Constraints To Guarantee Power Grid Safety

Verification of the chip power distribution network is a critical stepin modern IC design. Vectorless verification, developed as analternative to simulation-based methods, requires user-specified current constraints and checks if the worst-case voltage drops at all grid nodes are below user-specified thresholds. However, obtaining/specifying the current constraints remains a burdensome task for design teams. In this thesis, we define and address the inverse problem: given a grid, we will generate circuit current constraints which, if satisfied by the underlying logic, will guarantee grid safety. This approach has many potential applications, including various grid quality metrics, and power grid-aware placement and floorplanning. We give a rigorous problem definition and develop some key theoretical results related to maximality of the current space. We then develop two constraints generation algorithms that target key quality metrics like the peak total power allowed by the grid and the uniformity of the temperature distribution.M.A.S