Impact of intellectual property cores on field programmable gate array designs

grantor: University of TorontoIntellectual Property (IP) design is a rapidly growing industry and designers and users are being challenged to develop infrastructure and standard interfaces for this new industry. This research studies the impact that Intellectual Property cores have on the design of Systems-on-Chip (SoC) implemented on Field Programmable Gate Arrays (FPGAs). To obtain an understanding of the current state of core technology, a system was built using multiple IP cores. A core was designed to learn about core design issues while the remaining cores were obtained from vendors. The results were slightly discouraging as it is not a simple process to incorporate third party cores into a design, nor was it easy to obtain cores for the system. Still, the experience has provided much insight as to what problems must be addressed in the IP industry to facilitate a design methodology that includes the use of IP. These challenges include basic concerns such as interfacing difficulties as well as documentation problems that have been grossly underestimated. Yet the issue remains: circuits are becoming too complex to custom design and achieve the desired time-to-market of a product; so how can we interface IP from vendors to a system design in a methodical and timely fashion?M.A.Sc