Design of Logarithmic Multipliers

This thesis deals with the possibilities of improving logarithmic multipliers using approximation methods. The goal was to implement logarithmic multipliers according to the constructions described in the literature and to identify the possibilities of their modifications. This work describes the way in which the implementation of multiplier circuits and their parts took place. Ways to improve these circuits based on the replacement of their components and overall modification using evolutionary methods are proposed here. The parameters of the created logarithmic multipliers are compared with the values of the available approximation multipliers